Our client is a market leader and innovator in energy efficient power conversion with its highly integrated controller ICs and proprietary high voltage Gallium Nitride (GaN) transistor technology. They are seeking to add a Sr. Silicon Level Failure Analysis Engineer to their team in San Jose, CA. The Senior Silicon Level Failure Analysis Engineer will perform device level failure analysis to support RMA and customer issues.

Salary base range is 100-120K (DOE) plus RSU’s.

• Perform fault isolation and defect analysis/characterization on power IC’s to identify root causes of product failures in power supply applications and/or in production test.
• Provide comprehensive technical reports to customers on findings from product failure investigations.
• Provide corrective actions to internal and external customers based on the results of the analysis.
• Produce effective verbal and written communication of results, which will be used to drive improvements in product design, process technology, and applications.

• BS in Electronic Engineering or equivalent discipline is required. MSEE preferred.
• Minimum of 3 years of experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices.
• Hands-on experience in failure analysis, electrical fault isolation and defect characterization tools and techniques.
• Experience with ATE, curve trace, nano/micro-probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, XRAY, FIB, SEM/EDX and manual cross-sectioning and de-processing techniques.
• Experience using both parallel-polishing and wet chemical etch techniques.
• In-depth understanding of both digital and analog circuits, device physics and IC fabrication processes.
• Ability to interpret IC ATE test data log is required.
• Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required.
• Ability to write cogent and convincing technical reports suitable for external customers.